FDD6670A FDD6670A, rev. c FDD6670A n-channel, logic level, powertrench ? ? ? ? ? mosfet general description this n-channel logic level mosfet is produced using fairchild semiconductor's advanced powertrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. applications ? dc/dc converter motor drives february 2000 features 66 a, 30 v. r ds(on) = 0.008 ? @ v gs = 10 v r ds(on) = 0.010 ? @ v gs = 4.5 v. low gate charge (35nc typical). fast switching speed. high performance trench technology for extremely low r ds(on) . ? 2000 fairchild semiconductor corporation g s d to-252 s d g absolute maximum ratings t c =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 30 v v gss gate-source voltage 20 v i d maximum drain current -continuous ( note 1 ) 66 t a = 25 o c (note 1a) 15 maximum drain current -pulsed 100 a maximum power dissipation t c = 25 o c (note 1) 70 t a = 25 o c (note 1a) 3.2 p d t a = 25 o c (note 1b) 1.3 w t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r jc thermal resistance, junction-to-case (note 1) 1.8 c/w r ja thermal resistance, junction-to-ambient (note 1a) 40 c/w thermal resistance, junction-to-ambient (note 1b) 96 c/w package marking and ordering information device marking device reel size tape width quantity FDD6670A FDD6670A 13 ?? 16mm 2500
FDD6670A FDD6670A, rev. c electrical characteristics t a = 25 c unless otherwise noted s y mbol parameter test conditions min typ max units drain-source avalanche ratings (note 2) w dss single pulse drain-source avalanche energy v dd = 15 v, i d = 66 a 400 mj i ar maximum drain-source avalanche current 66 a off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a30 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c25mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a i gssf gate-body leakage current, forward v gs = 20v, v ds = 0 v 100 na i gssr gate-body leakage current, reverse v gs = -20 v, v ds = 0 v -100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a11.63v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c-4mv/ c r ds(on) static drain-source on-resistance v gs = 10 v, i d = 15 a v gs = 10 v, i d = 15 a,t j =125 c v gs = 4.5 v, i d =13 a 0.0065 0.0090 0.0085 0.008 0.013 0.010 ? i d(on) on-state drain current v gs = 10 v, v ds = 5 v 50 a g fs forward transconductance v ds = 5 v, i d = 12 a 55 s dynamic characteristics c iss input capacitance 3200 pf c oss output capacitance 820 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 400 pf switching characteristics (note 2) t d(on) turn-on delay time 15 27 ns t r turn-on rise time 15 27 ns t d(off) turn-off delay time 85 105 ns t f turn-off fall time v dd = 15 v, i d = 1 a, v gs = 10 v, r gen = 6 ? 42 68 ns q g total gate charge 35 50 nc q gs gate-source charge 9 nc q gd gate-drain charge v ds = 15 v, i d = 15 a, v gs = 5 v, 16 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 2.3 a v sd drain-source diode forward voltage v gs = 0 v, i s = 2.3 a (note 2) 0.72 1.2 v a) r ja = 40 o c/w when mounted on a 1in 2 pad of 2oz copper. b) r ja = 96 o c/w when mounted on a minimum pad . notes: 1. r ja is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the drain tab . r jc is guaranteed by design while r ca is determined by the user's board design. scale 1 : 1 on letter size paper 2. pulse test: pulse width 300 s, duty cycle 2.0%
FDD6670A FDD6670A, rev. c typical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0.8 1 1.2 1.4 1.6 1.8 2 2.2 0 1020304050 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 3.0v 10v 4.0v 3.5v 4.5v 6.0v 0 0.005 0.01 0.015 0.02 0.025 246810 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 8 a t a = 125 o c t a = 25 o c 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 15a v gs = 10v 0 10 20 30 40 50 012345 v ds , drain-source voltage (v) i d , drain-source current (a) v gs = 10v 3.0v 4.5v 3.5v 0 10 20 30 40 50 60 11.522.533.54 v gs , gate to source voltage (v) i d , drain current (a) t a =- 55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature.
FDD6670A FDD6670A, rev. c typical characteristics (continued) figure 7. gate-charge characteristics. figure 8. capacitance characteristics. figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1. transient themal response will change depending on the circuit board design. 0 2 4 6 8 10 0 10203040506070 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 15a v ds = 5v 10v 15v 0 1000 2000 3000 4000 5000 0 5 10 15 20 25 30 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.01 0.1 1 10 100 1000 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 10s 1s 100ms 100 ja = 96 o c/w t a = 25 o c 10ms 1ms 0 50 100 150 200 0.001 0.01 0.1 1 10 100 t 1 , time (sec) p(pk), peak transient power (w) single pulse r ja = 96 c/w t a = 25 c 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transient thermal resistance r ja (t) = r(t) + r ja r ja = 96 c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p ( pk ) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5
trademarks acex? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast ? fastr? gto? hisec? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. syncfet? tinylogic? uhc? vcx? isoplanar? microwire? pop? powertrench qfet? qs? quiet series? supersot?-3 supersot?-6 supersot?-8 ? rev. d
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